What is the fastest and easist way to communicate electonically with anyone else in the world ? Radio comunications is common and simple , but few people or organization have radio transmittrs and receivers . If they did , they would have to operate on your frequency , use your type of modulation , and be available at the appropriate time . Other condintions such as radio wave propagation also enter into the picture . So radio communications is simply not the most conveniet .

The answer to the question is simple . The fastest and easiest way to communicate with anyone else in the world is by the telephone . The telephone network is a vast electronic communications system that is in place , and virtually everyone uses it . You can talk to anyone else in the world by simply dialing their number . Your voice signal then travels over hundreds or even thousands of miles of wire and even over microwave relay and satellite communications links . In newer long-distance telephone systems , your voice may be carried on a light beam in fiber-optic cable .

Although voice is the primary signal carried by the telephone system , this network is now widely used to carry digital information as well . When it is necessary for computers to communicate or for a personal computer or termminal to have access to large mainframe computer , the telehpone network serves as the communication medium .

There are two primary problems in transmitting digital data over the telephone network . The first problem is that binary signals are usually switched dc pulses . That is , the binary 1s and 0s are represented by pulses of a single polarity , uaually positive . The telephone line is designed to carry only ac analog signals . Voice and other analog signals are processed by numerous components , circuits , and equipment along the way . Usually only ac signals of a specific frequency range are allowed . Voice frequencies in the 300- to 300- Hz range are the most common If a binary signal were applied directly to the telephone network , it simply would not pass . The transformers , capacitive coupling , and other ac circuitry virtually ensure that no dc signals get through . Futher , binary data is usuall transmitted at high speeds . This high - speed data would essentially be filtered out by the system with its limited bandwidth . The question is : “ Just how does digital data get transmitted over the telephone network ? ” The answer is by using modems .

the circuit used to translate digital information itno a form suited to voice - band transmission is known as a Modulator and the circuit to perform the reverse function is known as a demodulator . Since the transmission is normally dublex (i.e.in both directions at once ) both circuits are required at each end and the combination is called a modem is a device containing both a modulator and a demodulator .

A modem causes the binary dc pulses to modulate an anlog sine wave carrier that is compatible with the telephon line . The modem makes the binary signals compatible with the analog telephone network . And even though the bandwidth of the telephone network is essentially restricted to 3 kHz , a variety of tricky modulation techniques permit serial data transmission rates as high as about 15,000 bits/s to be transmitted . In this section we take a look at the various modulation techniques used in modern data communications modems . These include frequency - shfit keying , phase - shift keying and quadrature amplitulation

Two other modes of operation are used for communication over a transmission channel . These are half duplex , where both ends of the communication link can send and receive information , but not at the same time , and simplex , where information can be only sent in one direction across the link . Figure 9.2 shows the way that modems are commonly used in digital data transmission .

Fig. 9.2

2400 baud. 9600 bps. These are familiar terms for any modem user. The terms baud and bps are often used interchangeably. However, the two are not the same at all. The carrier signal is characterized by the number of signal intervals, or pulses, that are transmitted per second. Each pulse is called a baud. So The unit of measurement used to describe the number of state changes taking place in the carrier wave in one second is the baud. The term "baud" was named after J.M.E. Baudot, a French telegraphy expert. His full name (Baudot) is used to describe a five-bit digital code used in Teletype systems. Bps stands for bits per second. Bps is a measure of how many bits can be transmitted during one pulse (one baud). So,

bps = baud * number of bits per baud.

The two are often confused because early modems used to transmit only 1 bit per baud, so a 1200 baud modem would also be transmitting 1200 bps.

These days, we need higher speeds. But for two-way communications, the baud limit is 1200 baud. So the technique is to try and "pack" as many bits as you can into 1 baud.

A modem operating at 9600 bps is still only transmitting at 1200 baud. But it is "packing" 8 bits into each baud:

9600 bps = 1200 baud * 8 bits per baud.

Digital Modulation is the process by which a property or a parameter of a digital signal is varied in proportion to a second signal. Due to its far better performance as compared to the analog modulation schemes. Digital Modulation is playing a very important role in transmission of information in today's world.

Digital modulation techniques are used in high data rate synchonous modems for digital communication over telephone circuits . These modems can transmit end - to - end data rates of up to 9600 bps ( information rate ) . How it is possible to transmit 9.6 kbps over a 3 - kHz bandwith telephone line is explained in this section . The digital modulation schemes listed for standard . Different methods of digital modulation are available. Each method is using

a different parameter of carrier signal that is being modulated with

reference to that of the signal being transmitted. Some common digital

modulation schemes are as follows:

In amplitude shift keying (ASK), different bits in the data stream are represented by different amplitudes of the carrier signal. The frequency of the carrier remains the same. Binary data stream consists of a series of 1's and 0's. The one binary digit (1) is represented by the presence, at constant amplitude, of the carrier and the other by the absence of the carrier. This technique is called on-off keying (OOK) and is shown in figure9.3.

Fig 9.3

ASK is a rather inefficient modulating technique as it is susceptible to sudden gain changes. During transmission of data, the noise introduced into the signal affects the amplitude of the carrier signal which results in the degradation of the transmitted signal. It is also because of this reason that the speed of the system using this technique is very limited. Such a scheme supports a maximum of 1200 bps on voice grade lines and is not used for satellite communications .

The oldest and simplest from of modulation used in modems is frequency - shift keying ( FSK ) . In FSK , two sine wave frequencies are used to represent binary 0s and 1s . For example a binary 0 , usually called a space in data communications jargon , has a frequency of 1070 Hz . A binary 1 , referred to as a mark , is 1270 Hz . These two frequencies are alternately transmitted to create the serial binary data . The resulting signal looks something like that shown in fig.9.4

Fig. 9.4

Note that both of the frequencies are well within the 300- to 3000- Hz bandwidth normally associated with the telephone system . This is illustrated in Fig .9.5 .

1070 Hz 2225 Hz

300 Hz 1270Hz 2025Hz 3KHz

Fig. 9.5

To permit simultaneous transmit and receive operations with a modem , known as fullduplex operation , another set of are defined , These are also indicated in Fig . 4 - 3 Abinary 0 or space is 2025 Hz , while a binary 1 or mark is 2225 Hz . These tones are also within the telephon bandwidth but are spaced for enough from the other frequencies so that selective filters can be used to distinguish between the two . The 1070- and 1270- Hz tones are used for transmitting ( originate ) and the 2025- and 2225- Hz tones are used for receiving ( answer ) .

A genral block diagram of an FSK modem is illustrated in Fig 9.6

Fig. 9.6 Block diagram of an FSK modem

Each modem contains an FSK modulator and an FSK demodulator so that both send and receive operations can be achieved . Bandpass filters at the inputs to each modem separate the two tones . For example , in the upper modem , a bandpass filter allows frequencies between 1950 and 2300 Hz to pass . This means that the 2025- and 2225- Hz tones will be passed but the 1070- and 1270- Hz tones generated by the internal modulator will be rejected . The lower modem has a bandpass filter

that accepts the lower - frequency tones while rejecting the upper - frequency tones generated internally .

Note also that both systems contain a device called a UART which stands for universal asynchronous receiver transmitter . This is a digital IC used to perform parallel - to - serial and serial - to - parallel data transfers . Most data transfers and operations inside the computer are parallel , but as you know , data communications uses only serial binary data . The UART performs the necessary convsions .

Figure 9.7 shows a general block diagram a UART . All this circuitry is typically contained within a single large - scale IC .

Fig. 9.7 General block diagram of a UART

Parallel data from the computer data bus is fed into and out of a bidirectional data buffer which is usually a storge register with appropriate level - shifting circuits . The data , usually parallel 8 - bit words , is put on an internal data bus . Before being transmitted , the data is stored first in a buffer storage register and then sent to a shift register . A clock singal shifts the data out serially 1 bit at a

time . Note here that the internal circuitry adds start and stop bits and a parity bit . The start and stop bits signal the beginning and end of the wored , and the parity bit is used for error detection . The resulting serial data word is transmitted 1 bit at a time .

The receive section of the UART is at the bottom of the Fig . 9.7 . Serial data is shifted into a shift register . There the start , stop , and parity bits are stripped off . The remaining data is transferred to a buffer regis ter , to the internal data bus , and through the bidirectional data buffer to the computer in parallel from . The clock and control logic circuits in the UART control all internal shifting and data transfer operations under the direction of control signals from the computer .

Ical FSK modulator is simply an oscillator whose frequency can be switched between two frequencies , usually by switching in different capacitor values . Both RC and LC oscillators are used . At the lower audio frequencies , RC qscillators are preferred because of thier simplicity . A variety of demodulators are also used . These include PLL, pulse - averaging discriminator , and others .

Most of the newer modems use digital techniques because they are simpler and more adaptable to IC implementation . One type of digital FSK modulator in Fig .9.8.

Fig. 9.8

A clock oscillator generates a clock at a frequency of 271,780 Hz It is applied to a binary frequency divider . This divider is usually some from of binary counter with various feedback logic gates to set the divide ratio . This frequency divider is set up so that it will divide by two different integer values . One divide rqtio will produce the mark frequency , while the other will produce the space frequency .

To transmit a space at 1070 Hz , the divide ratio logic in fig.9.8 produces frequency division by 127 . That is , when the serial binary input is zero , the frequency divider output will be 1/127 its input . This means the output frequency will be 2140 Hz . This is fed to a single flip - flop which divides the frequency by 2 , producing the desired 1070- Hz output . The flip - flop produces a 50 percent duty cycle square wave ; that is , its on and off times are equal in lenghth . The reaon for this is that if the duty cycle of the frequency divider is other than 50 percent , the square wave when converted to a sine wave will produce excessive distortion . The flip -flop output is passed throygh a low - pass filter which removes the higher odd harmonics producing a 1070- Hz sine wave tone .

When a binary 1 is applied to the divide ratio logic , the frequency divider will divider by 107 . This produces an output frequency of 2540 Hz which when divided by 2 in the flip - flop prduces the desired 1270- Hz output . The low - pass filter removes the higher - frequency harmonics , producing a sine wave output .

A digital method of FSK demodulation is shown in Fig .9.9.

Fig. 9.9 a digital FSK demodulator

The sine wave FSK signal is applied to a limiter which removes any amplitude variations and which shapes the sibnal into a square wave . The square wave is then applied to a gate circuit .

The gate is used to turn a 1 - M H z clock signal off and on . A binary counter counts or accumulates the 1 -MHz clock pulses .

When a low - frequency space signal is applied of the period of signal will be long , thereby allowing the gate to open and the binary counter to accumulate the clock pulses . The detection logic which is a set of binary gates determines whether the number in the binary counter is above or below some predetermined value . For the low - frequency tone input , the number in the counter will be higher than the counter value when the high - frequency or mark signal is applied to the input . The detection logic produces a binary 0 or binary 1 output depending upon whether the number in the counter is above or below a specific value between the two limits .

Frequency - shift keying is used primarily in low - speed modems capable of transmitting data up to a speed of 300 baud or bits/s . This is a relatively slow data rate and is rarely used to day .

Phase - shift keying is a carrier system in which only discrete phase states are allowed . Usually 2ⁿ phase states are used , and n= 1 gives two - phase ( binary, BPSK ) , n = 2 gives four - phase ( quadriphase , QPSK ) , n =3 gives eight - phase , n = 4 gives sixteen - phase , and so forth .

Binary PSK is a two - phase modulation scheme in which carrier is transmitted ( 0⁵ phase , referenc ) to indicate a SPACE ( or digital 0 ) . The phase shift does not have to be 180⁵ , but this allows for the maximum separation of the digital states . Maximizing the phase-state separation is important because the receiver has to distinguish one phase from the other even in a noisy environment .

In figure 9.10 When the digital voltage is high , D₁ and D₃ conduct with ground G being the data current return path .

A high frequency carrier coupled across T₁ will then be connected through closed switches D₁ and D₃ to the primary of T₂ . Notice the instantaneous phase of the carrier vector at T₂ given by the + signs . If the data polarity reverses , D₁ and D₃ reverse - bias ( open ) while D₂ and D₄ conduct as short cricuits But notice that , for the same instantaneous carrier phase at T₁ , the phase at T₂ will be reversed from that of the previous data condition - the carrier phase has been shifted by 180 ⁵ . This is a very simple phase - reversal modulator.

Like any other PM receiver , the PSK demodulator must have an internal signal whose frequency is exactly equal to the incoming carrier in order to demodulate the received signal .

With analog PM , a phase - locked loop (PLL ) is used that locks up to the received carrier . However , BPSK with isudden phase reversal is equivalent to constant - amplitude DSB-SC , and no discrete carrier component is present for directly locking the PLL . The BPSK signal is written .

s (t) = A cos [w _c t + q d(t) ] 9-1

where q _d =0 or p rad depending on whether the digital input is d = 1 or -1 .

Substituting for the two possiple phase states , we see that Equation 9-1 can be equivalently written as s (t ) = A d (t) cos w _c t 9-2

As with DSB - SC demodulation , a Costas loop can be used . The costas loop is a PLL that combines quadrature ( “ at right angles “ ) - detector outputs to derive the PLL error votage . The error voltage then controls the VCO frequency that becomes the recovered - carrier signal needed for demodulation . If the recovered carrier ( VOC output ) signal is

vco(t) = 2 cos w _c t 9-3

The phase detector product produces an output given by

vpd(t) = (2 cos w _c t ) ´ ( A d(t) cos w _c t ) (9-4b)

= 2A d(t) cos² w _c t (9-3 b )

= 2A d(t) [0.5 + 0.5 cos 2w _c t ] (9-3 c)

= A d(t) + A d(t) cos 2w _c t (9-3 d)

Equation 9-3 d consists of the demodulated baseband information (data ) signal d(t) scaled by a constant factor A , and the right-hand part is BPSK signal at the second harmonic of the carrier frequency that can be filtered out in a lowpass filter .

Another technique for carrier recovery is the square-law or doubler method.

The square - law device is a frequency doubler that produces a discrete spectral component at twice the carrier frequency . the other components are filtered out , and the carrier second-harmonic component , with noise , is used to phase-lock a frequency-doubled VCO . When the noise is averaged out , the VCO frequency is precisely equal to the received carrier . A generalized block diagram of the PSK demodulator with carrier recovery for phase reference is shown in Figure9.11.

Fig . 9.11

Differential phase - shift keying ( DPSK ) means that the data is transmitted in the form of discrete phase shifts D q , where the phase reference is the previously transmitted signal phase . The obvious advantage of this technique is that the receiver , as well as the transmitter , does not have to maintain an absolute phase reference against which the received signal is compared .

In DPSK , the data stream is initially processed in an exclusive - NOR gate and then made bipolar as shown in Figure 9.12 before phase mdulation of the carrier . Figure 9.12 also shown the computer output data , the bipoler voltages applied to the BPSK modulator , and the final transmitted DPSK phase shift .

Fig. 9.12

The modulator of Figure 9.13 shows the same DPSK signal transmitted by the modulater of Figuer9.12. The inputs to the phase detector are the received signal and the same signal delayed by an amount equal to one bit period . the phase detector produces a positive voltage when the input phases are the same . the compartor is used to regenerate the data pulses and make them TTL computer compatible .

Fig . 9.13 differential psk

demodulator (DPSK)

Digital data systems for high - speed trancmission over bandwidth - limited media , like telephone lines and micro wave links , use highed - ( then binary ) level modulation techniques ; that is , they send more informatin per transmitted signal transition ( symbol ) than binary systems . Instead of bin-ary , then , this is M-ary encoding .

The most widely used multilevel modulation schemes today are M-ary PSK and QAM (quadrature AM,a combination of PSK and ASK ).Quaternary (4-level) PSK allows twice the information density of binary PSK and forms the basis for understanding all sorts of quadrature-carrier modems and digital microwave systems .

Quaternary or quadriphse PSK offers twice as many data bits per carrier phase change than does BPSK . Hence , QPSK ( 4-PSK ) finds wide application in high-speed carrier - modulated data transmission systems . Most data modems for synchronous transmission at data rates of 2400 bps on voice-grade telephone lines , and at higher rates on boardband circuits and microwave digital radio links, use differentially encoded QPSK .

The system data transfer rate is 2400 bps , but the transmission line signaling rate is 1200 symbols per second .

The circuitry for generating QPSK is forthcoming , but to get the idea behind how a four - level modulation might be generate , let us look at the block diagram of Figure9.14.

4-psk

Fig. 9.14

Note that this block diagram is general , and the voltage generated ( V _pm ) could be used to produce various four - level signals such as four - level intensity - modulation of laser .

When they arrive at the transmitter modulator , the incoming serial binary data bits are temporarily stored in pairs . Each binary digit pair ( dibit ) is then given a voltage level that , when applied to the phase modulator , prduces a phase shift corresponding to that of the Figure 14-6 constellation .

When the assigned voltage level causes a differential phase shift reative to the previous phase , this is called differential QPSK or DQPSK .

Compare the data stream to the transmitted phase and notice that , if the data bits are coming in at 2400 bps , the transmitted phase shiftis are at a rate of 1200 symbols per second - the baud rate The receiver reverses the process and produces 2400 bps . Thus , by using QPSK , the transmission line bandwidth can be one - half that of BPSK or FSK transmitting the same amount of information (bits per sacond) .

For genrating QPSK , we could apply the two bits forming each dibit ot two BPSK modulators that are in phase quadrature ( 90⁵ ) to each other . This circuit is shown in Figure9.15.

This is a very important circuit to conceptualize because it forms the basis for deriving higher - level ( 8 , 16 , 32 , ....... ) PSK , QAM , and oter quadrature-carrier modulation schemes . Incidentally , ther is nothing new about this quadrature-carrier modulator ; a continuous-phase version is used to produce color on your TV set .

Offset QPSK ( OQPSK ) or staggered QPSK ( S-QPSK ) is produced in a similar circuit to QPSK except that the secon of the bits , b₂ , input to the serial shift register is delayed one - half symbol period before being applied to its phase-reversal modulator . The results in instanneos carrier phase transitions of only 0⁵ or + 90⁵ form the previous phase state compared to QPSK^,s 0⁵ , + 90⁵ , and 180⁵ . Hence , OQPSK does not have the complete phase-reversal transients (and deep envelope notches) of QPSK when bandlimited . The primary circuit difference is that the diode quads are replaced with a true multiplier circuit .

Fig. 9.15

A block diagram showing QPSK demodulation and data recovery processing is given in Figure9.16.

Fig. 9.16

This system includes circuitry for recovering a coherent carrier for the phase detector . Various techniques are used for carrier recovery , including the Costas loop and multiply / divide schemes .

Following demodulation and filtering of the in-phase and quadrature signals , the data pulses are regenerated ( squared-up ) and processed to remove the receiver phase ambiguities , followed by parallel-to-serial conversion of the I and Q data .

The recovery of a clock signal from a synchronus data transmission is examined following quadrature demodulation and carrier recovery .

The question that aeises with the QPSK demodulator is why two data output lines , I and Q , are shown . After all , a single phase repesenting a 10 , 01 , 11 , or 00 is transmitted , and it would be a simple matter to have the demodulated voltage level trigger the appropriate two bits . The problem is ambiguity . The output of a phase detector , like PDI of Figure9.1, is ambiguous regarding which phase was transmitted .

Recall that the phase detector is a mixer or product detector with a dc-coupled output . Like all mixers , the function performed mathematically is multiplication . In the case of a phase , or product detecor , the two input signals have the same carrier frequnecy . therefore the difference or IF frequency is dc-or in the case where one of the singals is phase - modulated , the dc voltage varies with the phase variation . If the phase detector inputs are cos ( w _ct + q _d ) and cos w _c t, then the output will be .

cos ( w _ct + q _d ) x cos w _c t = 1/2 cos [( w _ct + q _d ) + w _c t ]

+ 1/2 cos [( w _ct - q _d ) - w _c t ]

= 1/2 cos [(2w _ct + q _d ) + 1/2 cos q _d

where q _d is the transmitted data phase .

Alow-pass filter is used to attenuate the second harmonic term so that the result is

V₀ = 1/2 cos q _d

q _d is the modulated phase ( + 3 p / 4 , + 3 p / 4 ) , and V₀ = 1/2 cos q _d is the output dc voltage representing the appropriate dibit . Figure 14-11 shows the four possible output of the I detector . The ambiguity is that , if 1/2 cos ( + 45⁵ ) = +0.35 is the detector , it is not known if + 45⁵ or - 45⁵ was received ; the same ambiguity exists for - 0.35 V and + 135⁵ .

In order to resolve the ambiguities , we must use a second phase detector operating in quadrature ( 90⁵) , called PDQ in Figure 9.16 and a two -level decision circuit to establish the final output full-binary data stream . Figure 9.17 shows the PDQ outputs for QPSK .

Fig. 9.17

Notice that the voltage for -p / 4 and + 3 p / 4 have the opposite polarity to those at the output of PDI . Hence a logic decision circuit can examine the two phase detector outputs and determine the transmitted phase . Having correctly determined the received dibit phase , the logic circuitry produces the corresponding two bits of serial data .

Because of transmission problems , especially in digital radio systems with multipath , fades , and other phase nonlinearities , the data bits are usually scrambled in a way that will make the transmitted QPSK spectrum quasi-random. This makes for a very complex receiver .

The problem is finding a carrier signal to lock to in the midst of a quasirandom keyed phase -reversal modulated signal spectrum . One type of carrier-recovery circuit for QPSK is the x 4 multiplier technique. It can be shown mathematiclly that spectral lines at the carrier frequency can be produced by frequency - multipling the random QPSK . After filtering , we divide back down useing a PLL to recover the carrier . Clearly , this is the same technique as used for BPSK carrier recovery

( where x 2 was used ) .

In the QPSK demodulator useing the x 4 method of carrier recovery, phase-reversal transitions as well as other noise will cause the recovered coherent carrier to jitter with phase and frequency noise . Phase jitter of the receiver phase reference must be minimized in order to minimize inter-symbol interference in multiplexed data systems and to minimize the bit error rate.

Once we get the demodulated I and Q data from the in-phase and quadrature detectors , it is necessary to produce a clock from the synchrous (and scrambled) data bit stream bit stream . Figure 9.18 is an example of a recovery scheme that produces pulses at amplitude transitions and uses a narrow - band filter ( a PLL ) to establish a “ clean ” clock signal ; that is , we synchronize a VCO with one of spectral lines created in the process of producing an RZ ( return - to - zero ) signal from the I ( OR THE Q ) data stream .

Fig. 9.18

In particular , a phase-locked loop will both synchroniz and filter simultaneously , so that the recovered ( sync ^, ed ) clock is the VCO output . This is the narrow-band tracking filter of Figuer 14-15 . The 274-Mbps T4M system uses the narrow-band PLL ; T1 systems recover timing with tuned circuits set for the 1.544-Mbps data rate .

Mltilevel signaling schemes are often compared on the basis of bandwith efficiency by a paarameter called information density D_i .Information density is defined by f_i

D_i =

B_i

where f_i = information transfer rate (bps) and B_i = information bandwidth (Hz) . Thus information density is given in bps/Hz . Much disagreement exists over how to define the bandwidth of digital signals . For the pupose of comparing multilevel transmission systems , the absolute minimum bandwidth of an ideal ( Nyquist ) channel is used .

Modems transmitting more than 2400 bps use synchronous fromats and higher than four - level encoding techniques to improve the information density and transmit more information in a given bandwidth . These M -ary techniqies encode n bits per symbol , where n = log₂ M , which comes from solving the basic relationship , M = 2ⁿ . As an example . n = 2 for four - level QPSK and two bits ( one dibit ) are transmitted per symbol .

8-PSK transmits n = 3 bits ( called tribits ) per transmission line change (symbol) . Consequently , 4800 bps can be sent at 1600 baud ( 4800/3 = 1600 ) using 8- PSK .

Note that these are modulated-carrier systems that produce upper and lower sidebands ; consequently the maximum theoretical information density D_i is determined from D_i = n ( bps/Hz ) . As examples , BPSK can theoretically achieve 1 bps/Hz , QPSK promises 2 bps/Hz . And 8- PSK , 3 bps/Hz . Operating QPSK systems are achieving slightly over 1.9 bps/Hz . * This is limited by sytem distortion , timing jitter , and other degradations .

Higher-level PSK signals can be generated by combining more BPSK modulators , as was done to produce the QPSK circuit. Of course , the fixed 90⁵ phase shift between the BPSK sections must be reduced ( compared to QPSK ) to accommodate the new vectors . More often , however , the QPSK scheme is maintained , and additional vectors are produced by varying the amplitudes of the separate quadrature carriers with attenuators in each BPSK section . Not only can M-ary PSK be implemnted with such a scheme , but QAM can as well .

One of the most popular modulation techniques used in modems for encoding more bits per baud is quadrature amplitude modulation ( QAM ) . This technique uses both AM and PM of a

carrier . In addition to producing different phase shifts , the amplitude of the carrier is also varied .

A popular version of QAM is known as 8 - QAM . This system uses a total of four different phase shifts as in QPSK and two carrier amplitudes . with four possible phase shifts and two different carrier amplitudes , a total of eight different states can be transmitted . With eight states , 3 bits can be encoded for each baud or symbol transmitted . Each 3 - bit binary word transmitted uses a different PM/AM combination .

One way to illustratr an 8 - QAM signal is to use what is known as a constellation diagram , which shows all possible phase and amplitude combination . An 8 QAM constellation diagram is shown in fig.9.19.

Fig. 9.19

The points in the diagram indicate the eight possible PM/AM combinations . Note that there are two amplitude levels for each phase position . Point A shows a low carrier amplitude with a phase shift of 135⁵ . It represents 100 . Point B shows a higher amplitude and a phase shift of 315⁵ . This sine wave represents 011 .

A block diagram of an 8 - QAM modulator is shown in Fig.9.20. The binary data to be transmitted is shifted serially into the 3 - bit shift register . These bits are applied in pairs to two 2 - to - 4 level converter is a cicuit that translates a pair of binary inputs into one of four possible dc output voltage levels . A 2-to-4 level coverter is basically a simple D/A converter . The idea is to produce four voltage levels corresponding to the different combinations of two input bits . The result is four equally spaced voltage levels . These are applied to the two balanced modulator fed by the carrier oscillator and a 90⁵ shifter as in a QPSK modulator . Each palanced modulator produces four different output PM/AM combinations . When these are combined in the linear mixer , eight different PM/AM combinations are produced . The result is 8-QAM as described previously . The most critical part of the circuit is the 2-to-4 level converters which must have very precise output amplitudes so that when they are combined in the linear summer , the correct output and phase combinations are produced .

A 16- QAM signal can also be generated by incording 4 input bits at a time.

The result is 8 different phase shifts and two amplitude levels combined for a total of 16 different PM/AM combinations .

Quadrature amplitude modulation is widely used in modems which transmit computer data over the telephone lines . Recall that the telephone system bandwidth is restricted to approximately 3 k Hz . For that reason , it is extremely difficult to transmit binary data at speeds higher than approximately 1200 baud or bits/s . However , by using QPSK , QAM , or similar techniques , very high data rates can be achieved . For example , using QAM , data rates of 9600 bits/s are regularly achieved over the standard telephone network .

The BPSK , QPSK , QAM , and other techniques are also widely used to transmit digital data in microwave and satellite radio communications With very high frequency carriers , bit rates of millions of bits per second can easily be achieved with minimum transmission error in a noisy environment .

Fig. 9.20

An 8_QAM

modulator

So what's in the future for today's modems? Not much, unfortunately. The available bandwidth in today's phone lines has reached its limit; the only way modem companies are going to be able to compete is to develop better and faster compression algorithms.

But all hope is not lost! Cable modems may be the "next big thing"!

Like the printing press, the railroad and the telephone, the Internet-- and particularly fast, broadband access to the home-- will transform society in ways we are only beginning to imagine. For this ansformation to occur, whatever broadband technology(ies) that emerges will have to be both economically and technologically viable. There are currently five technologies vying to act as a home users' driveway leading to the information superhighway. They are: cable modems; ADSL/xDSL; leased lines; ISDN; and satellite access. Of these, we believe that cable will become the commercial winner as it has the greatest economic and technical advantages and its roadblocks are not insurmountable.

Fast Internet access to the home will transform cyber society just as the automobile transformed American society in the first two-thirds of this century. Like that transformation fast access will

speed up current ways of doing things enough to bring them into the realm of human patience. The following table summarizes some of the potential behind fast Internet access to the home.

ISDN MODEMS

If you have ISDN service, you need a device to link your PC to the telephone line. Some people call this device an "ISDN modem." In that both your PC and the ISDN connection are complete

digital, no modulation is necessary to match the two, so you don't need a modem. You still need a device that matches the data rates and protocols of your PC to the ISDN line and protects the

line and your PC from suffering problems from one another. The device that does this magic is called an ISDN terminal adapter.

Another distinction between modems is between dial-up modems and leased line modems. The dial-up modem is what you think of when you hear the word "modem." The dial-up modem connects with a standard telephone line just as an ordinary telephone would.

The dial-up modem links to the telephone system and can dial a line o make a connection just like a telephone. You tie up your telephone line, and pay for the service, only when the dial-up modem is connected (or making a connection) to a distant modem. When you have no more data to send or receive, the dial-up modem hangs up so you don't get charged for telephone time you don't need.

In contrast, the leased line modem is always connected to a dedicated telephone line leased from the telephone company (hence the name). The leased line modem stays in constant contact, and you pay for a continuous telephone connection. The leased line modem has its own advantages. You never have to worry about a busy signal or a connection not getting through (although you can be disconnected because of line trouble). Moreover, the telephone company leases lines of various quality levels, some that are much better than ordinary dial-up circuits. Better phone lines mean greater data capacity, so leased line modems often are faster than the dial-up variety. Finally, the

constant connection means that you're always in touch. You get instant response. Remote terminals, such as those on computerized airline reservation systems, typically use leased line modems for

this reason.

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http:// www.Multitech.com/WHPaper/56KModem.htp